K2 PLL trouble

[aa7jc]

I have reached the "Alignment and Test, Part II" for the RF board.
This is where the PLL & BFO alignment takes place.

The PLL reference Oscillator alignment went very well with 12,1098.18 kHz
measured and a 12.81 kHz  range.

The VCO test at TP1 however resulted in no frequency reading with either
internal or external frequency counter.
The DC voltage measured at the left edge of R30 never changes when I adjust
L30 or the VFO freq (8.015 VDC).

I measured the voltage at all the VCO varactors and only D16 & D17 show
change, the other varactors (D21-D26) are all locked in at 8.015 VDC.

D16 & D17 voltages actually just jump at certain VFO points... The 12-bit
DAC does the same thing at it's output (as expected) I wouldn't say that
they actually track the VFO display.  adjustment of L30 does not have any
affect on anything.

Detailed voltage readings in the PLL circuit:

U4 voltage readings
  MC145170 (U4)
===================
 pin 1 = 2.1788 VDC
 pin 2 = 2.2925 VDC
 pin 3 = 0.0041 VDC
 pin 4 = 2.4677 VDC
 pin 5 = 4.9861 VDC
 pin 6 = 4.9861 VDC
 pin 7 = 4.9861 VDC ??
 pin 8 = 0.1087 VDC
 pin 9 = 0.0007 VDC
pin 10 = 0.0007 VDC
pin 11 = 0.0002 VDC
pin 12 = 0.0000 VDC
pin 13 = 0.0012 VDC ??
pin 14 = 4.8343 VDC
pin 14 = 4.8343 VDC
pin 16 = 4.8343 VDC

U5 voltage readings
   LTC1451 (U5)
===================
 pin 1 = 4.9887 VDC ??
 pin 2 = 0.0011 VDC ??
 pin 3 = 4.9887 VDC
 pin 4 = 4.8512 VDC
 pin 5 = 0.0000 VDC
 pin 6 = 2.0470 VDC
 pin 7 = 4.0874 VDC
 pin 8 = 4.8512 VDC

U6 voltage readings
   LMC662 (U6)
===================
 pin 1 = 7.685  VDC
 pin 2 = 4.0875 VDC
 pin 3 = 4.0873 VDC
 pin 4 = 0.0000 VDC
 pin 5 = 4.0554 VDC
 pin 6 = 0.0011 VDC ??
 pin 7 = 8.015  VDC
 pin 8 = 8.025  VDC

The BFO test is also a wee bit out of range.

The upper freq is 4917.81 (OK)
The lower freq is 4915.04 (HI)

I am thinking that there is probably some central theme that is afoot
causing all this difficulty.

I will find it soon enough..    But maybe someone has some insight to speed
things along..

Any ideas?

Ken Lotts
aa7jc

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[Bill Coleman-2]

On May 9, 2005, at 12:34 AM, Ken Lotts wrote:

> The BFO test is also a wee bit out of range.
>
> The upper freq is 4917.81 (OK)
> The lower freq is 4915.04 (HI)

I don't know about all the PLL problems, but I do know how to deal  
with this problem.

Check that C174 and C173 are the right values - should be 82 and 220  
pf, respectively, for a Rev B K2. Some earlier models used larger  
caps. I think it depends on the type of L33 inductor used. The  
current design uses a pre-wound toroid.

If the frequency range is too high, parallel C174 and C173 by 47 and  
100 pf, respectively. You can safely add up to 56 pf and 120 pf,  
respectively.

If this doesn't help, then add a couple of pf between the joined X3  
and X4 landing to ground. I used 3 pf and this moved my lower  
frequency down about 800 Hz without really affecting the upper  
frequency.

Bill Coleman, AA4LR, PP-ASEL        Mail: [hidden email]
Quote: "Not within a thousand years will man ever fly!"
             -- Wilbur Wright, 1901

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