Posted by
KK7P on
Feb 07, 2010; 4:10pm
URL: http://elecraft.85.s1.nabble.com/K3-in-a-cw-pileup-needs-work-tp4523884p4529755.html
> ...Lyle would have to comment on whether the DSP
> AGC is developed before or after the IF gain is applied...
Assuming ATT and PRE are OFF, hardware AGC voltage begins to have an
effect on IF amplifier gain with a signal at the antenna in the region
of -60 dBm, plus or minus a few dB. The hardware AGC voltage is
developed at the final IF of 15 kHz and applied to the 8.215 MHz IF
stage. Its purpose is to prevent the 15 kHz A to D converter at the DSP
from being driven beyond its input limits (called over-ranging).
The "onset of hardware AGC" level is influenced by PRE (which increases
gain ab out 10 dB, decreasing the signal required at the antenna by the
same 10 dB), ATT (which reduces signals by 10 dB, thus increasing the
required signal at the antenna), and RF Gain when backed off sufficiently.
What is "sufficiently"? The DSP outputs a voltage to control the IF
gain of the radio. This voltage is compared with the hardware AGC
voltage, and the higher voltage is applied to reduce the IF gain. If
the RF Gain is backed off enough so that the resulting gain control
voltage is grater than the hardware AGC voltage derived from the 15 kHz
IF signal, then the criterion for "sufficiently" has been met.
The DSP reads the hardware AGC voltage, regardless of the source, and
uses the value as part of the S Meter calculation.
The DSP AGC algorithm is computed based on the 15 kHz IF signal applied
to the DSP's A to D converter. Thus it is after the IF gain is applied.
Enjoy!
73,
Lyle KK7P
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